IO-Link is a low-speed (maximum 230.4 kbit/s) low-cost solution utilizing low-performance parts, especially for IO-Link devices. On the other hand, current time synchronization solutions in TSN, such as IEEE 1588 and its profiles, are complex protocols with substantial hardware, software and communication bandwidth requirements relative to the capabilities of IO-Link products. Therefore, the architectural, protocol, software and hardware design of the IOL-TS solution is a delicate process in which performance and cost optimum must be met.

Utilizing the intellectual property of TEConcept GmbH and BME IOL-TS the project has developed the following prototype components for the demonstrator:Time-driven TSN to IO-Link gateway and IO-Link master hardware and software architecture design and functional prototype on TEConcept GmbH.Time-driven IO-Link device architectural design and functional prototype on TEConcept GmbH hardware.Time transfer architecture design and prototype in the master (from TSN) and on the devices. Both master and device prototypes include BME’s time synchronization and peripheral synchronization intellectual property integrated with the TEConcept GmbH solutions.The IOL-TS solution requires minimal hardware changes, that can be done using PCB rework on the prototypes, and the protocol overhead and additional software resource needs are kept at a minimal, acceptable level according to our initial evaluations.The prototype is capable of achieving sub-microsecond time synchronization precision even if the device is implemented on a low-cost microcontroller.